1. Technical Field
The present disclosure relates to a wiring structure and a semiconductor package. The present disclosure also relates to a wiring structure having dummy conductive structures, which can help to avoid peeling of conductive lines in the wiring structure.
2. Description of the Related Art
It can be desirable to miniaturize semiconductor devices, in some implementations. Miniaturization of semiconductor devices can help to improve device performance and to reduce device manufacturing cost. Fine pitch technology in wiring design of semiconductor devices can help to miniaturize semiconductor devices. Fine pitch technology can involve a width of a conductive line being less than about 10 micrometers (μm), or less than about 3 μm. It is desired to have a width of conductive lines on such a scale.
Wiring design for fine conductive lines can be challenging. In a layout of wiring design, a wiring structure may include a dense region and at least one sparse region. A dense region is a region including relatively more conductive lines in a given area than the sparse region, and a sparse region is a region including relatively less conductive lines in a given area. In a manufacturing process of a wiring structure, a seed layer can be formed prior to the formation of conductive lines, which can be formed by, for example, a plating process. Subsequent to the formation of conductive lines, an etching process can be performed by, for example, a spin coater to remove the exposed seed layer. The amount of metal that is etched away by an etching solution per milliliter is, in some cases, approximately constant. When spin coating is used for etching, the amount of an etching solution used in a dense region and at least one sparse region can thus be constant. In an etching process, the amount of an etching solution for the wiring structure can be determined based on the amount of the etching solution required to etch away the seed layer. In such implementations, the amount of an etching solution applied to the sparse regions may be excessive, and the conductive lines in the sparse region may be over-etched and have a greater critical dimension (CD) loss. Accordingly, the etching process can have different impacts on the conductive lines in the dense regions and the sparse regions.